发布时间 : 星期三 文章KT0806L - V1.4 - 图文更新完毕开始阅读b552a4d676eeaeaad1f330b1
Monolithic Digital Stereo FM Transmitter
Radio-Station-on-a-Chip?
KT0806L ?? Features Hardware compatible with KT0806 Additional features to KT0806 Software standby; Automatic power down power amplifier when silence is detected; Multiple reference clock support including from 32.768KHz to 26MHz; ALC (Automatic Level Control) Higher SNR (66dB) Increased audio frequency response Software controlled XTAL selection Professional Grade Performance: SNR ≥ 66 dB Stereo Separation > 40 dB International compatible 70MHz ~ 108MHzUltra-Low Power Consumption: < 17 mA operation current < 3 μA standby current Small Form Factor: 16-pins QFN 3x3 Simple Interface: Single power supply Standard 2-wire I2C MCU interface Advanced Digital Audio Signal Processing: On-chip 20-bit ΔΣ Audio ADC On-chip DSP core On-chip 24dB PGA with optional 1dB stepAutomatic calibration against process and temperature 1.6V ~ 3.6V supply Programmable transmit level Programmable pre-emphasis (50/75 μs) Pb-free and RoHS Compliant Figure 1: KT0806L System Diagram ?? General Description KT0806L, our new generation of low cost Monolithic Digital FM Transmitter, is designed to process high-fidelity stereo audio signal and transmit modulated FM signal over a short range. It’s based on the architecture of award-winning KT0801 and it’s also an upgrade of KT0806. The additional features added to KT0806L are standby mode through software, ALC (automatic level control), multiple reference clock, increased SNR performance and frequency response. The KT0806L features dual 20-bit ΔΣ audio ADCs, a high-fidelity digital stereo audio processor and a fully integrated radio frequency (RF) transmitter. An on-chip low-drop-out regulator (LDO) allows the chip to be integrated in a wide range of low-voltage battery-operated systems with power supply ranging from 1.6V to 3.6V. The KT0806L is configured as an I2C slave and programmed through the industry standard 2-wire MCU interface. Thanks to its high integration level, the KT0806L is mounted in a generic 16-pin QFN package. It only requires a single low-voltage supply. No external tuning is required that makes design-in effort minimum. KT Micro, Inc., 22391 Gilberto, Suite D Rancho Santa Margarita, CA 92688 Tel: 949.713.4000 http://www.ktmicro.com Fax: 949.713.4004 Copyright ?2010, KT Micro, Inc..Applications MP3 Player, Cellular Phone, PDA, PND, Portable Personal Media player and its accessory, Laptop Computer, Wireless Speaker Rev. 1.4 Information furnished by KT Micro is believed to be accurate and reliable. However, no responsibility is assumed by KT Micro for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of KT Micro, Inc..
1 Operation Condition
KT0806L
Table 1: Operation Condition Parameter Symbol Operating Condition Min Typ Max Units IO/Regulator Supply IOVDD Relative to GND 1.6 3.6 V Ambient Temperature TA -30 25 70 ℃
2 Specifications and Features
Table 2: FM Transmitter Functional Parameters (Unless otherwise noted TA = -30-70 ℃,
IOVDD=1.6~3.6 V, Fin = 1 KHz)
Parameter SymbolTest/Operating Min Nom Max Units
Condition
FM Frequency Range Ftx Pin 12 70 108 MHzCurrent Consumption IVDD Pin 16 with PA (power
amp.) at default power
- 17 mA mode (PA_bias = 0, RFGAIN[3:0]=1111)
Standby Current Istand Pin 16 - 0.1 1 μA Signal to Noise Ratio SNR Vin = 1 Vp-p, Gin = 0 - 66 - dB Total Harmonic Distortion THD Vin = 1 Vp-p, Gin = 0 - 0.3 % Left/Right Channel Balance BAL Vin = 1 Vp-p, Gin = 0 -0.2 - 0.2 dB Stereo Separation (Left<->Right) SEP Vin = 1 Vp-p, Gin = 0 40 - dB Sub Carrier Rejection Ratio SCR Vin = 1 Vp-p, Gin = 0 - - 60 dB
1Input Swing Vin Single-ended input - 0.35 2 VRMSPGA Range for Audio Input Gin -15 0 12 dB PGA Gain Step for Audio Input Gstep 1 4 dB Required Input Common-Mode Vcm Pin 2,4
0 0.8 1.8 V Voltage when DC-coupled Power Supply Rejection2 PSRR IOVDD = 1.9 ~ 3.6 V 40 - - dB
2Ground Bounce Rejection GSRR IOVDD = 1.9 ~ 3.6 V 40 - - dB Input Resistance (Audio Input) Rin Pin 2, 4 120 150 180 k? Input Capacitance (Audio Input) Cin Pin 2, 4 0.5 0.8 1.2 pF Audio Input Frequency Band Fin Pin 2, 4 20 - 15k Hz Transmit Level Vout 96 103 113 dBμVChannel Step STEP - 50 KHzPilot Deviation 7.5 15 KHzAudio Deviation 75 112.5 KHzFrequency Response Mono,-3dB, ΔF=60KHz,
20 15,000Hz 50/75μs pre-emphasis
Pre-emphasis Time Constant Tpre PHTCNST = 1 - 50 - μs
PHTCNST = 0 - 75 - μs Crystal/External Clock CLK Input clock 32.768 40,000KHz
22-wire IC Clock SCL Pin 11 0 100 400 KHzHigh Level Input Voltage VIH Pin 7, 8, 10, 11 0.75 x IOVDD
- V
IOVDD+ 0.25
Low Level Input Voltage VIL Pin 7, 8, 10, 11 0.25 x
V - 0.25 -
IOVDD
Notes:
1. Maximum is given on the condition of PGA gain = -15dB. 2. Fin = 20 ~ 15KHz.
Copyright ?2010, KT Micro, Inc. 2
KT0806L
3 Package and Pin List
Table 3: KT0806L Pin Definition
Pin Index Name I/O Type Function 1 NC Not connected internally. 2 INL Analog Input Left channel audio input. 3 GND Ground Ground. 4 INR Analog Input Right channel audio input. 5 NC1 Reserved. Do not connect. 6 NC2 Reserved. Do not connect. 7 SW1 Digital Input Control bit. Chip enable, supply mode and clock source. 8 SW2 Digital Input Control bit. Chip enable, supply mode and clock source. 9 GND Ground Ground 10 SDA Digital I/O Serial data I/O. 11 SCL Digital I/O Serial clock input. 12 PA_OUT Analog OutputFM RF output. 13 GND Ground Ground 14 XO Analog I/O Crystal output. 15 XI/CLK Analog I/O Crystal input or external reference clock input. 16 IOVDD Power 1.6~3.3V external logic IOVDD or Regulator high supply input.
XI/CLK15 IOVDD16 GND13 XO14 NC
INL GND INR
1 2 3 4 567812Top View 11109PA_OUT SCL SDA GND
Copyright ?2010, KT Micro, Inc.
NC1Figure 2: Pin-out
NC2 SW1 SW2 3
4 I2C Compatible 2-Wire Serial Interface
4.1 General Descriptions
KT0806L
The serial interface consists of a serial controller and registers. An internal address decoder transfers the content of the data into appropriate registers. Please note that the I2C address is 0x 0110110 the same as in KT0806. Neither software nor hardware change is needed if KT0806L is used to replace KT0806. Both the write and read operations are supported according to the following protocol:
Write Operations: BYTE WRITE:
The write operation is accomplished via a 3-byte sequence: Serial address with write command Register address Register data
A write operation requires an 8-bit register address following the device address word and acknowledgment. Upon receipt of this address, the KT0806L will again respond with a “0” and then clock in the 8-bit register data. Following receipt of the 8-bit register data, the KT0806L will output a “0” and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition (see Figure 3).
Read Operations: RANDOM READ:
The read operation is accomplished via a 4-byte sequence: Serial address with write command Register address Serial address with read command Register data
Once the device address and register address are clocked in and acknowledged by the KT0806L, the
microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The KT0806L acknowledges the
device address and serially clocks out the register data. The microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 3).
RANDOM REGISTER WRITE PROCEDURE S 0 1 1 0 1 1 0WA A AP 7 bit address register address data Acknowledge Acknowledge STOP condition START condition WRITE command Acknowledge RANDOM REGISTER READ PROCEDURE S 0 1 1 0 1 1 0WA AS0111110RA AP 7 bit address register address 7 bit address data Acknowledge Acknowledge Acknowledge START condition WRITE command READ condition NO Acknowledge STOP condition
Figure 3: Serial Interface Protocol
Copyright ?2010, KT Micro, Inc. 4