发布时间 : 星期五 文章北航数字EDA实验1-8+数字去噪器更新完毕开始阅读c7b918a602768e9950e7388c
reg[7:0] ra,rb,rc,rd; reg[7:0] va,vb,vc,vd;
always @ (a or b or c or d) begin {va,vb,vc,vd}={a,b,c,d}; sort2(va,vb); sort2(vb,vc); sort2(vc,vd); sort2(va,vb); sort2(vb,vc); sort2(va,vb); {ra,rb,rc,rd}={va,vb,vc,vd}; end
task sort2; inout[7:0] x,y; reg[7:0] tmp; if(x>y) begin tmp=x; x=y; y=tmp; end endtask
endmodule
module sort4_2(clk,reset,ra,rb,rc,rd,a);
output[7:0] ra,rb,rc,rd; input[7:0] a; input clk,reset; reg[7:0] ra,rb,rc,rd; reg[7:0] va,vb,vc,vd; reg[2:0] i;
always @ (posedge clk) begin
if(!reset) begin
va=0;vb=0;vc=0;vd=0;i=0; end
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else begin if (i<4) begin i=i+1;
va=a;
sort2(va,vb); sort2(vb,vc); sort2(vc,vd); sort2(va,vb); sort2(vb,vc); sort2(va,vb);
{ra,rb,rc,rd}={va,vb,vc,vd};
end end end
task sort2;
inout[7:0] x,y; reg[7:0] tmp; if(x>y) begin
tmp=x; x=y; y=tmp; end endtask
endmodule
`timescale 1ns/100ps
module seven_1; reg[7:0] a,b,c,d; wire[7:0] ra,rb,rc,rd;
initial begin a=0;b=0;c=0;d=0;
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repeat(4) begin #100 a ={8{$random}}; b ={8{$random}}; c ={8{$random}}; d ={8{$random}}; end
#100 $stop; end
sort4_1 m (.a(a),.b(b),.c(c),.d(d), .ra(ra),.rb(rb),.rc(rc),.rd(rd));
endmodule
module seven_2; reg reset,clk; reg[7:0] a;
wire[7:0] ra,rb,rc,rd;
initial begin reset=0; clk=0; #100 reset=1;
a ={8{$random}};
#100 a ={8{$random}}; #100 a ={8{$random}}; #100 a ={8{$random}}; #100 $stop; end
always #50 clk=~clk;
sort4_2 m (.clk(clk),.reset(reset),.ra(ra),.rb(rb),.rc(rc),.rd(rd),.a(a));
endmodule
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实验仿真：
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